This invention relates in general to visual displays for electronic devices and in particular to improved spacers for field emission displays.
FIG. 1 is a simplified side cross-sectional view of a portion of a field emission display 10 including a faceplate 18 and a baseplate 20 in accordance with the prior art. FIG. 1 is not drawn to scale. The faceplate 18 includes a transparent viewing screen 22, an antireflective layer 23, a transparent conductive layer 24 and a cathodoluminescent layer 26. The transparent viewing screen 22 supports the layers 23, 24 and 26, acts as a viewing surface and as a wall for a hermetically sealed package formed between the viewing screen 22 and the baseplate 20. The viewing screen 22 may be formed from glass. The antireflective layer 23 may be formed from Si3N4 having a thickness of 900 Angstroms. The transparent conductive layer 24 may be formed from indium tin oxide. The cathodoluminescent layer 26 may be segmented into localized portions that are separated from each other within openings in a grille 28 of light-absorbing, opaque material formed on the antireflective layer 23. The light absorption and opacity of the grille 28 increases the contrast of the faceplate 18. The grille 28 is formed by conventional patterning of a layer of material such as silicon, cobalt oxide, manganese oxide or chromium oxide.
In a conventional monochrome display 10, each localized portion of the cathodoluminescent layer 26 forms one pixel of the display 10. Also, in a conventional color display 10, each localized portion of the cathodoluminescent layer 26 forms a primary color such as a green, red or blue sub-pixel of the display 10. Materials useful as cathodoluminescent materials in the cathodoluminescent layer 26 include Y2O3:Eu (red, phosphor P-56), Y3(Al, Ga)5O12:Tb (green, phosphor P-53) and Y2(SiO5):Ce (blue, phosphor P-47) available from Osram Sylvania of Towanda Pa. or from Nichia of Japan.
The baseplate 20 includes emitters 30 formed on a planar surface of a substrate 32, which may be formed from glass having a layer of silicon formed on it. The baseplate 20 is coated with a dielectric layer 34. In one embodiment, this is effected by deposition of silicon dioxide via a conventional TEOS process. The dielectric layer 34 is formed to have a thickness that is approximately equal to or just less than a height of the emitters 30. This thickness is on the order of 0.4 microns, although greater or lesser thicknesses may be employed. A conductive extraction grid 38 is formed on the dielectric layer 34. The extraction grid 38 may be formed, for example, as a thin layer of polysilicon. The radius of an opening 40 created in the extraction grid 38, which is also approximately the separation of the extraction grid 38 from the tip of the emitter 30, is about 0.4 microns, although larger or smaller openings 40 may also be employed.
In operation, the extraction grid 38 is biased to a voltage on the order of 100 volts, although higher or lower voltages may be used, while the baseplate 32 is maintained at a voltage of about zero volts. Signals coupled to the emitter 30 allow electrons to flow to the emitter 30. Intense electrical fields between the emitter 30 and the extraction grid 38 cause field emission of electrons from the emitter 30 in response to the signals impressed on the emitter 30.
An anode voltage VA, ranging up to as much as 5,000 volts or more but often 2,500 volts or less, is applied to the faceplate 18 via the transparent conductive layer 24. The electrons emitted from the emitter 30 are accelerated to the faceplate 18 by the anode voltage VA and strike the cathodoluminescent layer 26. The electron bombardment causes light emission in selected areas, i.e., those areas adjacent to where the emitters 30 are emitting, and forms luminous images such as text, pictures and the like.
A gap separating the faceplate 18 and the baseplate 20 of the conventional field emission display 10 is relatively small, on the order of one thousandth of an inch or twenty-five microns per 100 volts of anode voltage VA. Too large a gap leads to spreading of the emitted electrons and thus to defocusing or blurring of luminous images formed on the faceplate 18. Too small a gap leads to catastrophic failure of the display 10 due to arcing between the faceplate 18 and the baseplate 20. The gap must be evacuated in order for electrons to travel from the emitters 30 to the faceplate 18. As a result, atmospheric pressure is exerted on the faceplate 18 and the baseplate 20 that forces the baseplate 20 and the faceplate 18 toward each other.
In relatively small displays 10, such as those having a diagonal measurement of an inch or less, the pressure on the faceplate 18 does not cause significant bowing of the faceplate 18. In larger displays 10, however, the faceplate 18 tends to bow towards the baseplate 20, and the baseplate 20 also bows towards the faceplate 18. In a display 10 having a diagonal measurement of thirty inches, the force compressing the baseplate 20 and the faceplate 18 together is several tons. The bowing is exaggerated because of need to keep the faceplate 18 and the baseplate 20 light and thus to make them as thin as is practicable. Bowing leads to non-uniform spacing between the faceplate 18 and the baseplate 20, causing focusing and intensity variations and thereby degrading images formed on the faceplate 18. As a result, spacers 62 are incorporated between the faceplate 18 and the baseplate 20.
The spacers 62 typically are formed from glass and have a width of 25 to 250 micrometers. The spacers 62 typically extend from the baseplate 20 to the faceplate 18 and thus have a height that is similar to the spacing separating the faceplate 18 from the baseplate 20, in the range of 0.2 to 1 mm. In relatively small displays 10, the transparent viewing screen 22 may be formed from glass having a thickness of about 1.1 mm. In such displays 10, spacers 62 are needed about every fifteen mm. in order to provide adequate support for the faceplate 18, but the spacers 62 may be separated by smaller distances. The spacers 62 typically are positioned to contact the faceplate 18 in areas that are opaque due to the grille 28 in order to avoid interfering with images formed on the display 10.
Spacers 62 tend to be made from insulating materials because the large voltage applied to the transparent conductive layer 24 otherwise causes arcing between the baseplate 20 and the faceplate 18. Additionally, other techniques that might be tried are either impractical or unworkable for a variety of reasons. For example, forming reverse-biased diodes (not illustrated) on the baseplate 32 and placing conductive spacers 32 on the reverse-biased diodes is impractical, because the materials requirements for such diodes are not compatible with other requirements for the baseplate 32.
Typically, the spacers 62 are made from glass or ceramic. As described in U.S. Pat. No. 5,717,287, entitled xe2x80x9cSpacers For A Flat Panel Display And Method,xe2x80x9d issued to Amrine et al., the spacers 62 can cause problems in the display 10. When the spacers 62 are affixed to the faceplate 18 using organic glue, the glue can chemically decompose, causing contamination of the evacuated interior of the display 10. Alternatively, the glue can exhibit mechanical failure, causing the spacers 62 to become detached and misplaced in the interior of the display 10. Affixation of glass spacers 62 to the faceplate 18 using glass frit results in a brittle bond that is subject to mechanical failure and that may cause particulate contamination within the display 10. Additionally, use of a jig to facilitate correct placement of the spacers 62 on the faceplate 18 is laborious and may be unreliable.
What is needed is a way to simplify formation and accurate placement of spacers in field emission displays and to provide more robust spacers for use in field emission displays.
In accordance with one aspect of the invention, a field emission display includes a spacer formed from silicon that prevents significant faceplate or baseplate bowing. In one aspect, the spacer is formed in situ on the faceplate after deposition of other faceplate components by anodic bonding of a silicon wafer to a glass layer that has been formed on the faceplate. Portions of the silicon wafer that are not needed for the spacer are removed by directional etching processes. In one aspect, the spacer also forms a diode that is reverse biased by voltages applied to the faceplate to accelerate electrons towards the faceplate.